External seminar information
External Seminars
We will provide you with information on external seminars held by manufacturers that we deal with. We provide useful information for hardware and software developers, so please feel free to register and participate.
Seminar Overview
For customers who want to obtain product information, select products, or learn development methods, we will solve your development problems through on-site training and online seminars.
Get the latest product information
We will deliver the latest information on product features, programming methods, etc.
Specific and easy to understand
Learn specific development techniques at seminars using evaluation boards and various tools
Find hints for development and evaluation
Through training, you can learn efficient design and debugging methods.
Upcoming Events
| title | Company Name | category | Date | Closing date | Reception status |
|---|---|---|---|---|---|
| Versal Adaptive SoC Workshop [Exercises only] | AMD | FPGA | Monday, December 23 | December 12 | Now accepting applications |
| Versal Adaptive SoC Workshop [Lecture + Exercise] | AMD | FPGA | Monday, December 23 | December 12 | Now accepting applications |
| [VHDL] Beginner's guide to RTL design using Xilinx/Vivado tools | AMD | FPGA | December 23 (Monday) - December 24 (Tuesday) |
December 12 | Now accepting applications |
| VitisAI Platform | AMD | FPGA | December 19th (Thursday) - Friday, December 20 |
December 10 | Now accepting applications |
| Timing Closure Techniques Part 2 | AMD | FPGA | December 18 (Wednesday) | December 9 | Now accepting applications |
| Timing Closure Techniques Part 1 | AMD | FPGA | December 17th (Tuesday) | December 6 | Now accepting applications |
| Migrating to the Vitis Unified IDE | AMD | FPGA | Friday, December 13 | December 4th | Now accepting applications |
| Versal adaptive SoC: Quick Start | AMD | FPGA | Thursday, December 12 | December 3 | Now accepting applications |
| Zynq SoC Embedded System Development | AMD | FPGA | December 12th (Thursday) - Friday, December 13 |
December 3 | Now accepting applications |
| Debugging with Vivado Logic Analyzer: Basics | AMD | FPGA | Thursday, December 12 | December 3 | Now accepting applications |
| Verification with SystemVerilog | AMD | FPGA | December 10th (Tuesday) - December 11 (Wednesday) |
November 29 | Now accepting applications |
| FPGA design implementation with Vivado Design Suite | AMD | FPGA | December 9th (Monday) - December 10 (Tuesday) |
November 28 | Now accepting applications |
| Zynq UltraScale+ MPSoC Boot and Platform Management | AMD | FPGA | December 5th (Thursday) - Friday, December 6 |
November 26 | Now accepting applications |
| OS and Hypervisors in Adaptive SoCs | AMD | FPGA | December 3 (Tue) - December 4 (Wednesday) |
November 22 | Now accepting applications |
| Embedded Systems Software Design OS | AMD | FPGA | Friday, November 29th | November 20 | Registration closed |
| [Verilog] Beginner's guide to RTL design using Xilinx/Vivado tools | AMD | FPGA | November 28th (Thursday) - Friday, November 29th |
November 19 | Registration closed |
Past Seminars
| title | Company Name | category | Date | Closing date | Reception status |
|---|---|---|---|---|---|
| There is currently no event information | |||||
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