External seminar information

External Seminars

We will provide you with information on external seminars held by manufacturers that we deal with. We provide useful information for hardware and software developers, so please feel free to register and participate.

Seminar Overview

For customers who want to obtain product information, select products, or learn development methods, we will solve your development problems through on-site training and online seminars.

Get the latest product information

We will deliver the latest information on product features, programming methods, etc.

Specific and easy to understand

Learn specific development techniques at seminars using evaluation boards and various tools

Find hints for development and evaluation

Through training, you can learn efficient design and debugging methods.

Upcoming Events

title Company Name category Date Closing date Reception status
Armadillo Base OS Basic Seminar
Embedded
CPU Board
Manufacturer
On the homepage
Please check.
Now accepting applications
FPGA RTL Design Style Guide Seminar AMD FPGA January 30th (Thursday) -
January 31 (Friday)
January 21st Now accepting applications
Zynq UltraScale+ MPSoC System Architecture AMD FPGA January 30th (Thursday) -
January 31 (Friday)
January 21st Now accepting applications
Vivado Design Suite Implementation Methodology AMD FPGA January 30 (Thursday) January 21st Now accepting applications
UltraFast Design Methodology in Vivado Design Suite AMD FPGA January 29 (Wednesday) January 20 Now accepting applications
Getting started with Kria KV260 AMD FPGA January 29 (Wednesday) January 20 Now accepting applications
Versal AI Engine 2: Graph Programming with AI Engine Kernels AMD FPGA January 28 (Tue) -
January 29 (Wednesday)
January 17th Now accepting applications
Partial Reconfiguration in the Vivado Design Suite AMD FPGA Friday, January 24 January 15 Now accepting applications
High-Level Synthesis with Vitis HLS AMD FPGA January 23 (Thursday) -
Friday, January 24
January 14th Now accepting applications
Introduction to Artix-7 FPGA Design and Development using Vivado Design Suite AMD FPGA January 23 (Thursday) January 14th Now accepting applications
Versal Adaptive SoC Workshop [Exercises only] AMD FPGA January 22 (Wednesday) January 10 Now accepting applications
Versal Adaptive SoC Workshop [Lectures and Exercises] AMD FPGA January 22 (Wednesday) January 10 Now accepting applications
[Verilog] Beginner's guide to RTL design using Xilinx/Vivado tools AMD FPGA January 21 (Tue) -
January 22 (Wednesday)
January 9 Now accepting applications
Introduction to MicroBlaze development using ARTY AMD FPGA Tuesday, January 21 January 9 Now accepting applications
Versal AI Engine 1: Architecture and Design Flow AMD FPGA January 16th (Thursday) -
Friday, January 17
January 6th Now accepting applications
Zynq SoC System Architecture AMD FPGA January 16th (Thursday) -
Friday, January 17
January 6th Now accepting applications
Versal AI Engine: Quick Start AMD FPGA Friday, January 10 December 25 Now accepting applications
FPGA design implementation with Vivado Design Suite AMD FPGA January 9th (Thursday) -
Friday, January 10
December 24th Now accepting applications
Versal Adaptive SoC Workshop [Exercises only] AMD FPGA Monday, December 23 December 12 Registration closed
Versal Adaptive SoC Workshop [Lecture + Exercise] AMD FPGA Monday, December 23 December 12 Registration closed
[VHDL] Beginner's guide to RTL design using Xilinx/Vivado tools AMD FPGA December 23 (Monday) -
December 24 (Tuesday)
December 12 Registration closed
VitisAI Platform AMD FPGA December 19th (Thursday) -
Friday, December 20
December 10 Registration closed
Timing Closure Techniques Part 2 AMD FPGA December 18 (Wednesday) December 9 Registration closed
Timing Closure Techniques Part 1 AMD FPGA December 17th (Tuesday) December 6 Registration closed
Migrating to the Vitis Unified IDE AMD FPGA Friday, December 13 December 4th Registration closed
Versal adaptive SoC: Quick Start AMD FPGA Thursday, December 12 December 3 Registration closed
Zynq SoC Embedded System Development AMD FPGA December 12th (Thursday) -
Friday, December 13
December 3 Registration closed
Debugging with Vivado Logic Analyzer: Basics AMD FPGA Thursday, December 12 December 3 Registration closed

Past Seminars

title Company Name category Date Closing date Reception status
There is currently no event information