We will provide you with information on external seminars held by manufacturers that we deal with. We provide useful information for hardware and software developers, so please feel free to register and participate.
Seminar Overview
For customers who want to obtain product information, select products, or learn development methods, we will solve your development problems through on-site training and online seminars.
We will deliver the latest information on product features, programming methods, etc.
Learn specific development techniques at seminars using evaluation boards and various tools
Through training, you can learn efficient design and debugging methods.
| title | Company Name | category | Date | Closing date | Reception status |
|---|---|---|---|---|---|
| Armadillo Base OS Basic Seminar |
|
Embedded CPU Board |
Manufacturer On the homepage Please check. |
Now accepting applications | |
| High-Level Synthesis with Vitis HLS |
|
FPGA | September 29th (Tuesday) - Wednesday, September 30th |
September 15 | Now accepting applications |
| Spartan UltraScale+ FPGA: Architecture |
|
FPGA | September 28th (Monday) - September 29th (Tuesday) |
September 14 | Now accepting applications |
| Getting started with Kria KV260 |
|
FPGA | Monday, September 28th | September 14 | Now accepting applications |
| Embedded Linux Development with Yocto |
|
FPGA | Friday, September 25th | September 11 | Now accepting applications |
| Debugging with Vivado Logic Analyzer: Basics |
|
FPGA | Friday, September 25th | September 11 | Now accepting applications |
| Migrating to the Vitis Unified IDE |
|
FPGA | Friday, September 18th | September 9th | Now accepting applications |
| Zynq SoC Embedded System Development |
|
FPGA | September 15th (Tuesday) - Wednesday, September 16th |
September 4th | Registration closed |
| Software and hardware design and implementation seminar |
|
FPGA | September 15th (Tuesday) | September 4th | Registration closed |
| Verification with SystemVerilog |
|
FPGA | Thursday, September 10th - Friday, September 11th |
September 1st | Registration closed |
| [VHDL] Beginner's guide to RTL design using Xilinx/Vivado tools |
|
FPGA | September 8th (Tuesday) - Wednesday, September 9th |
August 28 | Registration closed |
| Multimedia solution using Zynq UltraScale+ MPSoC VCU |
|
FPGA | Thursday, September 3rd - September 4th (Thursday) |
August 25 | Registration closed |
| FPGA design implementation with Vivado Design Suite |
|
FPGA | Thursday, September 3rd - Friday, September 4th |
August 25 | Registration closed |
| Zynq SoC System Architecture |
|
FPGA | September 1st (Tuesday) - Wednesday, September 2nd |
August 21 | Registration closed |
| Zynq UltraScale+ MPSoC Boot and Platform Management |
|
FPGA | September 1st (Tuesday) - Wednesday, September 2nd |
August 21 | Registration closed |
| title | Company Name | category | Date | Closing date | Reception status |
|---|---|---|---|---|---|
| There is currently no event information | |||||