We will provide you with information on external seminars held by manufacturers that we deal with. We provide useful information for hardware and software developers, so please feel free to register and participate.
Seminar Overview
For customers who want to obtain product information, select products, or learn development methods, we will solve your development problems through on-site training and online seminars.
We will deliver the latest information on product features, programming methods, etc.
Learn specific development techniques at seminars using evaluation boards and various tools
Through training, you can learn efficient design and debugging methods.
| title | Company Name | category | Date | Closing date | Reception status |
|---|---|---|---|---|---|
| Armadillo Base OS Basic Seminar |
|
Embedded CPU Board |
Manufacturer On the homepage Please check. |
Now accepting applications | |
| Embedded Systems Software Design OS |
|
FPGA | November 28th (Friday) | November 18 | Now accepting applications |
| Embedded Systems Software Design Basic |
|
FPGA | Wednesday, November 26th - November 27th (Thursday) |
November 14 | Now accepting applications |
| Zynq UltraScale+ MPSoC Hardware Design |
|
FPGA | November 25th (Tue) - Wednesday, November 26th |
November 13 | Now accepting applications |
| Versal AI Engine 3: Kernel Programming and Optimization |
|
FPGA | November 20th (Thursday) - November 21st (Friday) |
November 11 | Now accepting applications |
| PCI Express Designs |
|
FPGA | November 20th (Thursday) - November 21st (Friday) | November 11 | Now accepting applications |
| [Verilog] Beginner's guide to RTL design using Xilinx/Vivado tools |
|
FPGA | November 18th (Tue) - Wednesday, November 19th |
November 7 | Now accepting applications |
| Spartan UltraScale+ FPGA: Architecture |
|
FPGA | November 17th (Monday) - November 18th (Tuesday) |
November 6 | Now accepting applications |
| Versal Gen2 Architecture |
|
FPGA | November 13th (Thursday) - November 14th (Friday) |
November 14 | Now accepting applications |
| Vivado Design Suite Tool Flow |
|
FPGA | November 13th (Thursday) | November 4th | Now accepting applications |
| Embedded Heterogeneous Design |
|
FPGA | November 11th (Tue) - Wednesday, November 12th |
October 30 | Now accepting applications |
| Software and hardware design and implementation seminar |
|
FPGA | November 11th (Tuesday) | October 30 | Now accepting applications |
| Timing Closure in the Vivado Design Suite |
|
FPGA | November 7th (Friday) | October 28 | Now accepting applications |
| Timing Constraints and Analysis in the Vivado Design Suite |
|
FPGA | November 6th (Thursday) | October 27 | Now accepting applications |
| Kria KV260 Vision AI |
|
FPGA | November 6th (Thursday) - November 7th (Friday) |
October 27 | Now accepting applications |
| Getting started with Kria KV260 |
|
FPGA | Wednesday, November 5th | October 24th | Now accepting applications |
| Designing with SystemVerilog |
|
FPGA | November 4th (Tue) - Wednesday, November 5th |
October 23 | Now accepting applications |
| High-Level Synthesis with Vitis HLS |
|
FPGA | October 30th (Thursday) - October 31st (Friday) |
October 21 | Registration closed |
| Vivado Design Suite Implementation Methodology |
|
FPGA | October 30th (Thursday) | October 21 | Registration closed |
| UltraFast Design Methodology in Vivado Design Suite |
|
FPGA | Tuesday, October 28th | October 17 | Registration closed |
| FPGA RTL Design Style Guide Seminar |
|
FPGA | October 27th (Monday) - Tuesday, October 28th |
October 16 | Registration closed |
| Versal AI Engine 2: Graph Programming with AI Engine Kernels |
|
FPGA | October 23rd (Thursday) - October 24th (Friday) |
October 14 | Registration closed |
| Zynq SoC Embedded System Development |
|
FPGA | October 21st (Tue) - Wednesday, October 22nd |
October 9 | Registration closed |
| OS and Hypervisors in Adaptive SoCs |
|
FPGA | October 21st (Tue) - Wednesday, October 22nd |
October 9 | Registration closed |
| FPGA design implementation with Vivado Design Suite |
|
FPGA | October 20th (Monday) - October 21st (Tuesday) |
October 8 | Registration closed |
| Zynq UltraScale+ MPSoC System Architecture |
|
FPGA | October 16th (Thursday) - October 17th (Friday) |
October 6th | Registration closed |
| [Verilog] Beginner's guide to RTL design using Xilinx/Vivado tools |
|
FPGA | October 16th (Thursday) - October 17th (Friday) | October 6th | Registration closed |
| Migrating from UltraScale+ Devices to Versal Adaptive SoCs | FPGA | Wednesday, October 15th | October 3 | Registration closed |
| title | Company Name | category | Date | Closing date | Reception status |
|---|---|---|---|---|---|
| There is currently no event information | |||||