External seminar information

External Seminars

We will provide you with information on external seminars held by manufacturers that we deal with. We provide useful information for hardware and software developers, so please feel free to register and participate.

Seminar Overview

For customers who want to obtain product information, select products, or learn development methods, we will solve your development problems through on-site training and online seminars.

Upcoming Events

title	Company Name	category	Date	Closing date	Reception status
Armadillo Base OS Basic Seminar		Embedded CPU Board	Manufacturer On the homepage Please check.		Now accepting applications
Zynq UltraScale+ MPSoC System Architecture		FPGA	January 27th (Tue) - Wednesday, January 28th	January 16th	Now accepting applications
FPGA RTL Design Style Guide Seminar		FPGA	January 27th (Tue) - Wednesday, January 28th	January 16th	Now accepting applications
Migrating from UltraScale+ Devices to Versal Adaptive SoCs		FPGA	January 30th (Friday)	January 21st	Now accepting applications
Vivado Design Suite Implementation Methodology		FPGA	January 29th (Thursday)	January 20	Now accepting applications
UltraFast Design Methodology in Vivado Design Suite		FPGA	January 27th (Tuesday)	January 16th	Now accepting applications
Getting started with Kria KV260		FPGA	January 30th (Friday)	January 21st	Now accepting applications
Introduction to MicroBlaze-v development using ARTY		FPGA	January 30th (Friday)	January 21st	Now accepting applications
[Verilog] Beginner's guide to RTL design using Xilinx/Vivado tools		FPGA	January 22nd (Thursday) - January 23 (Friday)	January 13	Now accepting applications
High-Level Synthesis with Vitis HLS		FPGA	January 20th (Tue) - Wednesday, January 21st	January 8th	Now accepting applications
Embedded Systems Software Design OS		FPGA	January 22 (Thursday)	January 13	Now accepting applications
Embedded Systems Software Design Basic		FPGA	January 20th (Tue) - Wednesday, January 21st	January 8th	Now accepting applications
Versal Gen2 Architecture		FPGA	January 15th (Thursday) - January 16th (Friday)	January 5th	Now accepting applications
FPGA design implementation with Vivado Design Suite		FPGA	January 15th (Thursday) - January 16th (Friday)	January 5th	Now accepting applications
Versal AI Engine: Quick Start		FPGA	Wednesday, January 14th	December 26	Now accepting applications
Embedded Linux Development with Yocto		FPGA	Wednesday, January 14th	December 26	Now accepting applications
Software and hardware system design seminar		FPGA	December 23rd (Tue) - Wednesday, December 24th	December 12	Now accepting applications
Timing Closure Techniques Part 2		FPGA	December 23 (Tuesday)	December 12	Now accepting applications
Timing Closure Techniques Part 1		FPGA	Monday, December 22nd	December 11	Now accepting applications
Design Closure Technique Design & Power		FPGA	December 18th (Thursday)	December 9	Now accepting applications
Versal Adaptive SoC: Network on Chip		FPGA	Wednesday, December 17th	December 8	Registration closed
Zynq SoC Embedded System Development		FPGA	December 16th (Tue) - Wednesday, December 17th	December 5th	Registration closed
Migrating to the Vitis Unified IDE		FPGA	December 16th (Tuesday)	December 5th	Registration closed
Introduction to MicroBlaze-v development using ARTY		FPGA	Monday, December 15th	December 4th	Registration closed
[VHDL] First RTL design using Xilinx/Vivado tools		FPGA	December 11th (Thursday) - December 12th (Friday)	December 2nd	Registration closed
Versal Adaptive SoC: Design Methodology Part 2		FPGA	December 12th (Friday)	December 3	Registration closed
Versal Adaptive SoC: Design Methodology Part 1		FPGA	Wednesday, December 10th - December 11th (Thursday)	December 1st	Registration closed
Introduction to Artix-7 FPGA Design and Development using Vivado Design Suite		FPGA	December 12th (Friday)	December 3	Registration closed
Debugging with Vivado Logic Analyzer: Basics		FPGA	December 11th (Thursday)	December 2nd	Registration closed
Versal Adaptive SoC: Architecture		FPGA	December 8th (Monday) - December 9th (Tuesday)	November 27	Registration closed
Versal adaptive SoC: Quick Start		FPGA	December 4th (Thursday)	November 25	Registration closed
Zynq SoC System Architecture		FPGA	December 2nd (Tue) - Wednesday, December 3rd	November 20	Registration closed
Verification with SystemVerilog		FPGA	December 2nd (Tue) - Wednesday, December 3rd	November 20	Registration closed
FPGA design implementation with Vivado Design Suite		FPGA	December 2nd (Tue) - Wednesday, December 3rd	November 20	Registration closed

Past Seminars